S500

From XApple
Jump to: navigation, search

S500 SoC (System on Chip) is a high performance application processor. It integrates Quad-Core Cortex-A9R4 processor with NEON (advanced SIMD) co-processor and VFPv3 instructions set, PowerVR SGX544 GPU and a independent VPU (Video Processing Unit).

It seems the S500 is just a relabeled ATM7059 28nm


S500 functional blocks.png

Features

  • CPU:
    • Quad-core ARM Cortex-A9R4 CPU.
    • ARM Cortex v7A instruction set 32KB L1 instruction cache, 32KB L1 data cache with 4-way set associative integrated.
    • NEON (advanced SIMD) and VFPv3 D-32 instuctions supported.
    • Supports VFP (Vector Floating Point) architecture and is compliant with the IEEE 754 standard for floating-point calculation.
    • 512KB L2 cache, with 16-way set associative L2 cache.
    • Harvard Level-1 memory system with MMU (Memory Management Unit) SCU (Snoop Control Unit) interface in charge of memory coherency between the four CPU cores.
    • In-order pipeline with dynamic branch prediction equipped.
    • ARM TrustZone support.
  • GPU:
  • Memory:
    • 72KB internal SRAM.
    • DDR3/DDR3L/LPDDR2/LPDDR3 controller up to 2GB.
    • NAND Flash controller with up to 72bit hardware ECC.
    • 3 on-chip SD/MMC controllers, supports SD 3.0, SDIO 3.0 and eMMC 4.5 protocols.
  • System Components:
    • 2 on-chip 2Hz controllers and 2 on-chip 32-bit Timer controllers.
    • On-chip ARM Generic Interrupt Controller V2.0.
    • 256-bit E-FUSE.
    • HDCP2 TX compliant to HDCP revision 2.1 and 2.0.
    • Clock Management Unit with one oscillator with 24MHz clock input and 7 embedded PLLs.
    • DMA Controller with 12 independent DMA channels.
  • Video:
    • Real-time video decoder of most popular video formats such as MPEG-4, H.264, etc.
    • Up to 1920*1080p@60fps video decoding.
    • Support video encoder for baseline H.264.
    • Max fps is up to 60fps@1920*1080, 5M pixel and 13M pixel.
    • Video size from 176*144 to 1920*1088.
  • JPEG:
    • JPEG Baseline Decoder size is from 48*48 to 30000*30000 (900Mpixels), maximum data rate is up to 100 million pixels per second.
    • For Progressive Decoder size is from 48*48 to 8192*8192.
    • JPEG Baseline Encoder Image size is from 48*48 to 8176*8176, max data rate up to 70 million pixels per second.
  • Display:
    • HDMI Transmitter Compatible with HDMI 1.4b, HDCP 1.1 and DVI 1.0.
    • MIPI DSI Interface compliant with MIPI DSI Specification version 1.01 and the D-PHY specification version 0.9.
    • LVDS Interface Compliant with the TIA/EIA-644-A LVDS standard.
    • 24-bit RGB interface
  • Camera:
    • Two CMOS sensor input channels.
    • DVP/MIPI CSI interface.
    • Max support 5M pixel input.
    • MIPI CSI Interface compliant with MIPI CSI-2 Specification version 1.0 and the D-PHY specification version 0.9.
  • Audio:
    • I2S/PCM:
      • Supports 2.0-channel I2S transmitter and receiver.
      • Sample rates up to 192k.
      • Supports 7.1-channel and 5.1-channel through I2S transmitter with ext.8-channel and 6-channel DAC or with ATC2603C, by TDM (time-division multiplexed) Mode.
      • Include 2 PCM Modules.
      • Include PCM TX and PCM RX, both can work as Master Mode or Slave Mode.
    • SPDIF: supports sample rate 96k/48k/44.1k/32k.
  • Connectivity:
    • Two independent USB 2.0 controllers.
    • One USB 3.0 controller
    • 10/100Mbs Ethernet MAC controller.
    • 6 on-chip PWMs.
    • 7 on-chip UART controllers.
    • 4 on-chip I²C controllers
    • 4 on-chip SPI controllers
    • Key controller: 4*3 Key matrix supported.
  • Package: TFBGA496 16mm*16mm (0.65mm Pitch).

How to check the SoC's temperature

Both SoC (containing CPU cores and GPU/VPU) and power management unit (PMU) contain internal thermal sensors to monitor the temperatures. Both chips get rather hot even when idle and might exceed 100°C under full load.

With Actions Semi's kernel the internal thermal sensors of the S500/ATC2603C are exposed via sysfs and can be read out easily. It's advisable to monitor both since the PMU's temperature scales linearly with CPU/GPU:

cat /sys/devices/virtual/thermal/thermal_zone1/temp # raw value from SoC (eg. 85000)
awk '{printf ("%0.1f",$1/1000); }' </sys/devices/virtual/thermal/thermal_zone1/temp # converted to degrees celsius (eg. 85.0)
cat /sys/devices/b0170000.i2c/i2c-0/0-0065/atc2603c-hwmon.0/ic_temperature # raw PMU output (eg. "49822 mCel")
awk '{printf ("%0.1f",$1/1000); }' </sys/devices/b0170000.i2c/i2c-0/0-0065/atc2603c-hwmon.0/ic_temperature # converted to degrees celsius (eg. 49.8)

Actions Semi's kernel provides both thermal throttling as well as emergency shutdown capabilities that are also exposed via sysfs and can be adjusted (simply echo a value in mCel into the respective sysfs node):

/sys/devices/virtual/thermal/thermal_zone1/trip_point_0_temp: 105000
/sys/devices/virtual/thermal/thermal_zone1/trip_point_1_temp: 115000
/sys/devices/virtual/thermal/thermal_zone1/trip_point_2_temp: 125000

When trip_point_0_temp is reached then thermal throttling should jump in and the cpufreq driver should adjust the clock speed to the minimum available. You should compare with the output of

cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies

When trip_point_2_temp is reached the responsible driver initiates a shutdown. Be aware that thermal throttling both influences massively the performance and also sometimes doesn't work (requires a kernel driver fix).

Related

S500/Pinmux: S500 pin multiplexing table.

S500 CPU nbench Benchmark: [1]

Personal tools
Namespaces

Variants
Actions
Navigation
Tools